1. Field of the Invention
The present invention relates generally to a data capture technique for high speed signaling, and more particularly pertains to a technique to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems.
The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit Simultaneous Bi-Directional (SiBiDi) signaling.
2. Discussion of the Prior Art
A large class of important computations can be performed by massively parallel computer systems. Such systems consist of many identical compute nodes, each of which typically consist of one or more CPUs, memory, and one or more network interfaces to connect it with other nodes.
The computer described in related U.S. provisional application Ser. No. 60/271,124, filed Feb. 24, 2001, for A Massively Parallel Supercomputer, leverages system-on-a-chip (SOC) technology to create a scalable cost-efficient computing system with high throughput. SOC technology has made it feasible to build an entire multiprocessor node on a single chip using libraries of embedded components, including CPU cores with integrated, first-level caches. Such packaging greatly reduces the components count of a node, allowing for the creation of a reliable, large-scale machine.
The present invention relates to the field of massively parallel computers used for various applications such as, for example, applications in the field of life sciences. More specifically, this invention relates to the field of high speed signaling, to either unidirectional signaling or Simultaneous BiDirectional (SiBiDi) signaling.
There are cases where large data transfers are required but the number of wires that can be used is limited. Simultaneous Bidirectional (SiBiDi) signaling allows the simultaneous transmission and reception of signals using the same wire. This reduces the number of wires by a factor of two. An example where large data transfers are needed but where the number of cables is severely constrained is a large parallel super computer with thousands of processors communicating through wires.
SiBiDi signaling operates by sending data on the same wire as it receives data. Therefore during reception one receives not only the desired data sent from the other end of the wire but also the data that one has just transmitted. Of course this corrupts the desired signal. However, since the data that was just transmitted is known one can “subtract it out”. This is done by standard SiBiDi circuitry.